// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Tracing implementation internals
#include "verilated_vcd_c.h"
#include "VRISCV_BOARD__Syms.h"


VL_ATTR_COLD void VRISCV_BOARD___024root__trace_init_sub__TOP__0(VRISCV_BOARD___024root* vlSelf, VerilatedVcd* tracep) {
    if (false && vlSelf) {}  // Prevent unused
    VRISCV_BOARD__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
    VL_DEBUG_IF(VL_DBG_MSGF("+    VRISCV_BOARD___024root__trace_init_sub__TOP__0\n"); );
    // Init
    const int c = vlSymsp->__Vm_baseCode;
    // Body
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBus(c+282,"debug_wb_pc", false,-1, 31,0);
    tracep->declBit(c+283,"debug_wb_rf_wen", false,-1);
    tracep->declBus(c+284,"debug_wb_rf_waddr", false,-1, 4,0);
    tracep->declBus(c+285,"debug_wb_rf_wdata", false,-1, 31,0);
    tracep->pushNamePrefix("RISCV_BOARD ");
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBus(c+282,"debug_wb_pc", false,-1, 31,0);
    tracep->declBit(c+283,"debug_wb_rf_wen", false,-1);
    tracep->declBus(c+284,"debug_wb_rf_waddr", false,-1, 4,0);
    tracep->declBus(c+285,"debug_wb_rf_wdata", false,-1, 31,0);
    tracep->declBit(c+286,"inst_sram_en", false,-1);
    tracep->declBit(c+300,"inst_sram_wen", false,-1);
    tracep->declBus(c+287,"inst_sram_addr", false,-1, 31,0);
    tracep->declBus(c+301,"inst_sram_wdata", false,-1, 31,0);
    tracep->declBus(c+19,"inst_sram_rdata", false,-1, 31,0);
    tracep->declBit(c+20,"data_sram_en", false,-1);
    tracep->declBit(c+21,"data_sram_wen", false,-1);
    tracep->declBus(c+22,"data_sram_addr", false,-1, 31,0);
    tracep->declBus(c+23,"data_sram_wdata", false,-1, 31,0);
    tracep->declBus(c+24,"data_sram_rdata", false,-1, 31,0);
    tracep->declBus(c+25,"data_sram_wmask", false,-1, 3,0);
    tracep->pushNamePrefix("cpu ");
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBit(c+286,"inst_sram_en", false,-1);
    tracep->declBit(c+300,"inst_sram_wen", false,-1);
    tracep->declBus(c+287,"inst_sram_addr", false,-1, 31,0);
    tracep->declBus(c+301,"inst_sram_wdata", false,-1, 31,0);
    tracep->declBus(c+19,"inst_sram_rdata", false,-1, 31,0);
    tracep->declBit(c+20,"data_sram_en", false,-1);
    tracep->declBit(c+21,"data_sram_wen", false,-1);
    tracep->declBus(c+22,"data_sram_addr", false,-1, 31,0);
    tracep->declBus(c+25,"data_sram_wmask", false,-1, 3,0);
    tracep->declBus(c+23,"data_sram_wdata", false,-1, 31,0);
    tracep->declBus(c+24,"data_sram_rdata", false,-1, 31,0);
    tracep->declBus(c+282,"debug_wb_pc", false,-1, 31,0);
    tracep->declBit(c+283,"debug_wb_rf_wen", false,-1);
    tracep->declBus(c+284,"debug_wb_rf_waddr", false,-1, 4,0);
    tracep->declBus(c+285,"debug_wb_rf_wdata", false,-1, 31,0);
    tracep->declBit(c+26,"id_allowin", false,-1);
    tracep->declBit(c+1,"exe_allowin", false,-1);
    tracep->declBit(c+302,"mem_allowin", false,-1);
    tracep->declBit(c+302,"wb_allowin", false,-1);
    tracep->declBit(c+27,"if_to_id_valid", false,-1);
    tracep->declBit(c+28,"id_to_exe_valid", false,-1);
    tracep->declBit(c+29,"exe_to_mem_valid", false,-1);
    tracep->declBit(c+30,"mem_to_wb_valid", false,-1);
    tracep->declArray(c+288,"if_to_id_bus", false,-1, 95,0);
    tracep->declArray(c+2,"id_to_exe_bus", false,-1, 315,0);
    tracep->declArray(c+31,"exe_to_mem_bus", false,-1, 217,0);
    tracep->declArray(c+38,"mem_to_wb_bus", false,-1, 212,0);
    tracep->declBus(c+12,"id_to_if_brbus", false,-1, 31,0);
    tracep->declBus(c+45,"exe_to_id_brbus", false,-1, 31,0);
    tracep->declBus(c+46,"mem_to_exe_brbus", false,-1, 31,0);
    tracep->declBus(c+46,"wb_to_mem_brbus", false,-1, 31,0);
    tracep->declQuad(c+291,"wb_to_id_rfbus", false,-1, 37,0);
    tracep->declQuad(c+47,"wb_to_id_cfbus", false,-1, 44,0);
    tracep->declBus(c+22,"exe_to_id_bypass", false,-1, 31,0);
    tracep->declBus(c+49,"exe_to_id_rdbypass", false,-1, 4,0);
    tracep->declBit(c+50,"exe_to_id_rfwenbypass", false,-1);
    tracep->declBus(c+51,"mem_to_id_bypass", false,-1, 31,0);
    tracep->declBus(c+52,"mem_to_id_rdbypass", false,-1, 4,0);
    tracep->declBit(c+53,"mem_to_id_rfwenbypass", false,-1);
    tracep->declBus(c+285,"wb_to_id_bypass", false,-1, 31,0);
    tracep->declBus(c+284,"wb_to_id_rdbypass", false,-1, 4,0);
    tracep->declBit(c+283,"wb_to_id_rfwenbypass", false,-1);
    tracep->declBus(c+54,"exe_to_id_cfbypass", false,-1, 31,0);
    tracep->declBus(c+55,"exe_to_id_csrbypass", false,-1, 11,0);
    tracep->declBit(c+56,"exe_to_id_cfwenbypass", false,-1);
    tracep->declBus(c+57,"mem_to_id_cfbypass", false,-1, 31,0);
    tracep->declBus(c+58,"mem_to_id_csrbypass", false,-1, 11,0);
    tracep->declBit(c+59,"mem_to_id_cfwenbypass", false,-1);
    tracep->declBus(c+60,"wb_to_id_cfbypass", false,-1, 31,0);
    tracep->declBus(c+61,"wb_to_id_csrbypass", false,-1, 11,0);
    tracep->declBit(c+62,"wb_to_id_cfwenbypass", false,-1);
    tracep->declBit(c+63,"exe_to_if_loadbypass", false,-1);
    tracep->declBit(c+63,"exe_to_id_loadbypass", false,-1);
    tracep->declBit(c+64,"id_to_if_brjmpbypass", false,-1);
    tracep->declBit(c+65,"exe_to_id_brjmpbypass", false,-1);
    tracep->declBit(c+66,"mem_to_exe_brjmpbypass", false,-1);
    tracep->declBit(c+66,"wb_to_mem_brjmpbypass", false,-1);
    tracep->pushNamePrefix("exe_stage ");
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBit(c+302,"mem_allowin", false,-1);
    tracep->declBit(c+1,"exe_allowin", false,-1);
    tracep->declBit(c+28,"id_to_exe_valid", false,-1);
    tracep->declArray(c+2,"id_to_exe_bus", false,-1, 315,0);
    tracep->declBus(c+45,"exe_to_id_brbus", false,-1, 31,0);
    tracep->declBit(c+29,"exe_to_mem_valid", false,-1);
    tracep->declArray(c+31,"exe_to_mem_bus", false,-1, 217,0);
    tracep->declBus(c+46,"mem_to_exe_brbus", false,-1, 31,0);
    tracep->declBit(c+20,"data_sram_en", false,-1);
    tracep->declBit(c+21,"data_sram_wen", false,-1);
    tracep->declBus(c+22,"data_sram_addr", false,-1, 31,0);
    tracep->declBus(c+23,"data_sram_wdata", false,-1, 31,0);
    tracep->declBus(c+25,"data_sram_wmask", false,-1, 3,0);
    tracep->declBus(c+24,"data_sram_rdata", false,-1, 31,0);
    tracep->declBus(c+22,"exe_to_id_bypass", false,-1, 31,0);
    tracep->declBus(c+49,"exe_to_id_rdbypass", false,-1, 4,0);
    tracep->declBit(c+50,"exe_to_id_rfwenbypass", false,-1);
    tracep->declBus(c+54,"exe_to_id_cfbypass", false,-1, 31,0);
    tracep->declBus(c+55,"exe_to_id_csrbypass", false,-1, 11,0);
    tracep->declBit(c+56,"exe_to_id_cfwenbypass", false,-1);
    tracep->declBit(c+63,"exe_to_if_loadbypass", false,-1);
    tracep->declBit(c+63,"exe_to_id_loadbypass", false,-1);
    tracep->declBit(c+65,"exe_to_id_brjmpbypass", false,-1);
    tracep->declBit(c+66,"mem_to_exe_brjmpbypass", false,-1);
    tracep->declBit(c+29,"exe_valid", false,-1);
    tracep->declBit(c+302,"exe_ready_go", false,-1);
    tracep->declBit(c+66,"exe_flush", false,-1);
    tracep->declArray(c+67,"id_to_exe_bus_r", false,-1, 315,0);
    tracep->declBus(c+77,"alu_src1", false,-1, 31,0);
    tracep->declBus(c+78,"alu_src2", false,-1, 31,0);
    tracep->declBus(c+22,"alu_result", false,-1, 31,0);
    tracep->declBit(c+79,"dst_load", false,-1);
    tracep->declBit(c+80,"dst_store", false,-1);
    tracep->declBit(c+81,"dst_writeback", false,-1);
    tracep->declBit(c+56,"dst_writeback_csr", false,-1);
    tracep->declBus(c+25,"ls_op", false,-1, 3,0);
    tracep->declBus(c+49,"rd", false,-1, 4,0);
    tracep->declBus(c+23,"rs2", false,-1, 31,0);
    tracep->declBus(c+54,"rs1", false,-1, 31,0);
    tracep->declBus(c+82,"imm", false,-1, 31,0);
    tracep->declBus(c+83,"alu_op", false,-1, 10,0);
    tracep->declBit(c+84,"exe_branch_bge", false,-1);
    tracep->declBit(c+85,"exe_branch_blt", false,-1);
    tracep->declBus(c+86,"exe_pc", false,-1, 31,0);
    tracep->declBus(c+87,"exe_dnpc", false,-1, 31,0);
    tracep->declBus(c+88,"exe_inst", false,-1, 31,0);
    tracep->declBus(c+89,"exe_tvec", false,-1, 31,0);
    tracep->declBit(c+90,"exe_ebreak", false,-1);
    tracep->declBit(c+91,"exe_ecall", false,-1);
    tracep->pushNamePrefix("exe_alu ");
    tracep->declBus(c+77,"alu_src1", false,-1, 31,0);
    tracep->declBus(c+78,"alu_src2", false,-1, 31,0);
    tracep->declBus(c+83,"alu_op", false,-1, 10,0);
    tracep->declBus(c+22,"alu_result", false,-1, 31,0);
    tracep->declBit(c+92,"op_add", false,-1);
    tracep->declBit(c+93,"op_sub", false,-1);
    tracep->declBit(c+94,"op_slt", false,-1);
    tracep->declBit(c+95,"op_sltu", false,-1);
    tracep->declBit(c+96,"op_and", false,-1);
    tracep->declBit(c+97,"op_or", false,-1);
    tracep->declBit(c+98,"op_xor", false,-1);
    tracep->declBit(c+99,"op_sll", false,-1);
    tracep->declBit(c+100,"op_srl", false,-1);
    tracep->declBit(c+101,"op_sra", false,-1);
    tracep->declBit(c+102,"op_lui", false,-1);
    tracep->declBus(c+103,"add_sub_result", false,-1, 31,0);
    tracep->declBus(c+104,"slt_result", false,-1, 31,0);
    tracep->declBus(c+105,"sltu_result", false,-1, 31,0);
    tracep->declBus(c+106,"and_result", false,-1, 31,0);
    tracep->declBus(c+107,"or_result", false,-1, 31,0);
    tracep->declBus(c+108,"xor_result", false,-1, 31,0);
    tracep->declBus(c+78,"lui_result", false,-1, 31,0);
    tracep->declBus(c+109,"sll_result", false,-1, 31,0);
    tracep->declQuad(c+110,"srl_sra_tmp", false,-1, 63,0);
    tracep->declBus(c+112,"srl_sra_result", false,-1, 31,0);
    tracep->declBus(c+77,"adder_a", false,-1, 31,0);
    tracep->declBus(c+113,"adder_b", false,-1, 31,0);
    tracep->declBit(c+114,"adder_cin", false,-1);
    tracep->declBus(c+103,"adder_result", false,-1, 31,0);
    tracep->declBit(c+115,"adder_cout", false,-1);
    tracep->popNamePrefix(2);
    tracep->pushNamePrefix("id_stage ");
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBit(c+26,"id_allowin", false,-1);
    tracep->declBit(c+1,"exe_allowin", false,-1);
    tracep->declBit(c+27,"if_to_id_valid", false,-1);
    tracep->declArray(c+288,"if_to_id_bus", false,-1, 95,0);
    tracep->declBit(c+28,"id_to_exe_valid", false,-1);
    tracep->declArray(c+2,"id_to_exe_bus", false,-1, 315,0);
    tracep->declBus(c+45,"exe_to_id_brbus", false,-1, 31,0);
    tracep->declBus(c+12,"id_to_if_brbus", false,-1, 31,0);
    tracep->declQuad(c+291,"wb_to_id_rfbus", false,-1, 37,0);
    tracep->declQuad(c+47,"wb_to_id_cfbus", false,-1, 44,0);
    tracep->declBus(c+22,"exe_to_id_bypass", false,-1, 31,0);
    tracep->declBus(c+49,"exe_to_id_rdbypass", false,-1, 4,0);
    tracep->declBit(c+50,"exe_to_id_rfwenbypass", false,-1);
    tracep->declBus(c+51,"mem_to_id_bypass", false,-1, 31,0);
    tracep->declBus(c+52,"mem_to_id_rdbypass", false,-1, 4,0);
    tracep->declBit(c+53,"mem_to_id_rfwenbypass", false,-1);
    tracep->declBus(c+285,"wb_to_id_bypass", false,-1, 31,0);
    tracep->declBus(c+284,"wb_to_id_rdbypass", false,-1, 4,0);
    tracep->declBit(c+283,"wb_to_id_rfwenbypass", false,-1);
    tracep->declBus(c+54,"exe_to_id_cfbypass", false,-1, 31,0);
    tracep->declBus(c+55,"exe_to_id_csrbypass", false,-1, 11,0);
    tracep->declBit(c+56,"exe_to_id_cfwenbypass", false,-1);
    tracep->declBus(c+57,"mem_to_id_cfbypass", false,-1, 31,0);
    tracep->declBus(c+58,"mem_to_id_csrbypass", false,-1, 11,0);
    tracep->declBit(c+59,"mem_to_id_cfwenbypass", false,-1);
    tracep->declBus(c+60,"wb_to_id_cfbypass", false,-1, 31,0);
    tracep->declBus(c+61,"wb_to_id_csrbypass", false,-1, 11,0);
    tracep->declBit(c+62,"wb_to_id_cfwenbypass", false,-1);
    tracep->declBit(c+63,"exe_to_id_loadbypass", false,-1);
    tracep->declBit(c+64,"id_to_if_brjmpbypass", false,-1);
    tracep->declBit(c+65,"exe_to_id_brjmpbypass", false,-1);
    tracep->declBus(c+116,"id_pc", false,-1, 31,0);
    tracep->declBus(c+117,"id_inst", false,-1, 31,0);
    tracep->declBus(c+118,"id_dnpc", false,-1, 31,0);
    tracep->declBit(c+119,"id_valid", false,-1);
    tracep->declBit(c+120,"id_ready_go", false,-1);
    tracep->declBit(c+65,"id_flush", false,-1);
    tracep->declArray(c+121,"if_to_id_bus_r", false,-1, 95,0);
    tracep->declBus(c+124,"src1", false,-1, 31,0);
    tracep->declBus(c+13,"src2", false,-1, 31,0);
    tracep->declBus(c+125,"op", false,-1, 4,0);
    tracep->declBus(c+126,"rs1", false,-1, 4,0);
    tracep->declBus(c+127,"rs2", false,-1, 4,0);
    tracep->declBus(c+128,"rd", false,-1, 4,0);
    tracep->declBus(c+129,"func3", false,-1, 2,0);
    tracep->declBit(c+130,"func7", false,-1);
    tracep->declBit(c+131,"op_prefix", false,-1);
    tracep->declBus(c+293,"imm_sel", false,-1, 4,0);
    tracep->declBit(c+132,"src_csr_sel", false,-1);
    tracep->declBus(c+133,"src1_sel", false,-1, 1,0);
    tracep->declBus(c+134,"src2_sel", false,-1, 2,0);
    tracep->declBus(c+135,"dst_sel", false,-1, 3,0);
    tracep->declBus(c+136,"alu_op", false,-1, 10,0);
    tracep->declBus(c+137,"ls_op", false,-1, 3,0);
    tracep->declBit(c+138,"id_branch_beq_bne", false,-1);
    tracep->declBit(c+139,"branch_rs1_eq_rs2", false,-1);
    tracep->declBit(c+140,"id_branch_bge", false,-1);
    tracep->declBit(c+141,"id_branch_blt", false,-1);
    tracep->declBit(c+142,"id_jal", false,-1);
    tracep->declBit(c+143,"id_jalr", false,-1);
    tracep->declBit(c+144,"id_ebreak", false,-1);
    tracep->declBit(c+145,"id_ecall", false,-1);
    tracep->declBus(c+294,"imm", false,-1, 31,0);
    tracep->declBit(c+283,"rf_wen", false,-1);
    tracep->declBus(c+126,"rf_raddr1", false,-1, 4,0);
    tracep->declBus(c+127,"rf_raddr2", false,-1, 4,0);
    tracep->declBus(c+284,"rf_waddr", false,-1, 4,0);
    tracep->declBus(c+146,"rf_rdata1", false,-1, 31,0);
    tracep->declBus(c+147,"rf_rdata2", false,-1, 31,0);
    tracep->declBus(c+285,"rf_wdata", false,-1, 31,0);
    tracep->declBit(c+62,"cf_wen", false,-1);
    tracep->declBus(c+295,"cf_raddr", false,-1, 11,0);
    tracep->declBus(c+61,"cf_waddr", false,-1, 11,0);
    tracep->declBus(c+14,"cf_rdata", false,-1, 31,0);
    tracep->declBus(c+60,"cf_wdata", false,-1, 31,0);
    tracep->declBus(c+148,"id_tvec", false,-1, 31,0);
    tracep->declBus(c+149,"rdata1", false,-1, 31,0);
    tracep->declBus(c+150,"rdata2", false,-1, 31,0);
    tracep->declBus(c+301,"crdata", false,-1, 31,0);
    tracep->declBit(c+151,"exe_rd_eq_rs1", false,-1);
    tracep->declBit(c+152,"exe_rd_eq_rs2", false,-1);
    tracep->declBit(c+15,"exe_csr_eq_csr", false,-1);
    tracep->declBit(c+153,"mem_rd_eq_rs1", false,-1);
    tracep->declBit(c+154,"mem_rd_eq_rs2", false,-1);
    tracep->declBit(c+16,"mem_csr_eq_csr", false,-1);
    tracep->declBit(c+296,"wb_rd_eq_rs1", false,-1);
    tracep->declBit(c+297,"wb_rd_eq_rs2", false,-1);
    tracep->declBit(c+17,"wb_csr_eq_csr", false,-1);
    tracep->declBus(c+18,"id_jalr_dst", false,-1, 31,0);
    tracep->pushNamePrefix("id_cf ");
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBus(c+295,"raddr", false,-1, 11,0);
    tracep->declBus(c+14,"rdata", false,-1, 31,0);
    tracep->declBit(c+62,"wen", false,-1);
    tracep->declBus(c+61,"waddr", false,-1, 11,0);
    tracep->declBus(c+60,"wdata", false,-1, 31,0);
    tracep->declBit(c+145,"ecall", false,-1);
    tracep->declBus(c+303,"cause", false,-1, 31,0);
    tracep->declBus(c+116,"epc", false,-1, 31,0);
    tracep->declBus(c+148,"tvec", false,-1, 31,0);
    tracep->declBus(c+155,"mcause", false,-1, 31,0);
    tracep->declBus(c+156,"mepc", false,-1, 31,0);
    tracep->declBus(c+157,"mtvec", false,-1, 31,0);
    tracep->declBus(c+158,"mstatus", false,-1, 31,0);
    tracep->declBit(c+159,"w_mcause", false,-1);
    tracep->declBit(c+160,"w_mepc", false,-1);
    tracep->declBit(c+161,"w_mtvec", false,-1);
    tracep->declBit(c+162,"w_mstatus", false,-1);
    tracep->popNamePrefix(1);
    tracep->pushNamePrefix("id_dec ");
    tracep->declBus(c+125,"op", false,-1, 4,0);
    tracep->declBus(c+163,"op3", false,-1, 7,0);
    tracep->declBus(c+164,"op37", false,-1, 8,0);
    tracep->declBus(c+293,"imm_sel", false,-1, 4,0);
    tracep->declBit(c+132,"src_csr_sel", false,-1);
    tracep->declBus(c+133,"src1_sel", false,-1, 1,0);
    tracep->declBus(c+134,"src2_sel", false,-1, 2,0);
    tracep->declBus(c+135,"dst_sel", false,-1, 3,0);
    tracep->declBus(c+136,"alu_op", false,-1, 10,0);
    tracep->declBit(c+139,"branch_rs1_eq_rs2", false,-1);
    tracep->declBit(c+138,"branch_beq_bne", false,-1);
    tracep->declBit(c+140,"branch_bge", false,-1);
    tracep->declBit(c+141,"branch_blt", false,-1);
    tracep->declBit(c+142,"jal", false,-1);
    tracep->declBit(c+143,"jalr", false,-1);
    tracep->declBus(c+137,"ls_op", false,-1, 3,0);
    tracep->declBit(c+145,"ecall", false,-1);
    tracep->declBit(c+165,"op_ebreak", false,-1);
    tracep->declBit(c+144,"ebreak", false,-1);
    tracep->declBit(c+131,"op_prefix", false,-1);
    tracep->declBit(c+166,"src1_is_pc", false,-1);
    tracep->declBit(c+167,"src1_is_rs1", false,-1);
    tracep->declBit(c+168,"src2_is_imm", false,-1);
    tracep->declBit(c+169,"src2_is_rs2", false,-1);
    tracep->declBit(c+170,"src2_is_4", false,-1);
    tracep->declBit(c+171,"dst_store", false,-1);
    tracep->declBit(c+172,"dst_load", false,-1);
    tracep->declBit(c+173,"dst_writeback", false,-1);
    tracep->declBit(c+132,"dst_writeback_csr", false,-1);
    tracep->declBit(c+174,"inst_lui", false,-1);
    tracep->declBit(c+175,"inst_auipc", false,-1);
    tracep->declBit(c+176,"inst_add", false,-1);
    tracep->declBit(c+177,"inst_addi", false,-1);
    tracep->declBit(c+178,"inst_sub", false,-1);
    tracep->declBit(c+179,"inst_and", false,-1);
    tracep->declBit(c+180,"inst_andi", false,-1);
    tracep->declBit(c+181,"inst_or", false,-1);
    tracep->declBit(c+182,"inst_ori", false,-1);
    tracep->declBit(c+183,"inst_xor", false,-1);
    tracep->declBit(c+184,"inst_xori", false,-1);
    tracep->declBit(c+185,"inst_slt", false,-1);
    tracep->declBit(c+186,"inst_slti", false,-1);
    tracep->declBit(c+187,"inst_sltu", false,-1);
    tracep->declBit(c+188,"inst_sltiu", false,-1);
    tracep->declBit(c+189,"inst_sll", false,-1);
    tracep->declBit(c+190,"inst_slli", false,-1);
    tracep->declBit(c+191,"inst_srl", false,-1);
    tracep->declBit(c+192,"inst_srli", false,-1);
    tracep->declBit(c+193,"inst_sra", false,-1);
    tracep->declBit(c+194,"inst_srai", false,-1);
    tracep->declBit(c+142,"inst_jal", false,-1);
    tracep->declBit(c+143,"inst_jalr", false,-1);
    tracep->declBit(c+195,"inst_beq", false,-1);
    tracep->declBit(c+196,"inst_bne", false,-1);
    tracep->declBit(c+197,"inst_bge", false,-1);
    tracep->declBit(c+198,"inst_bgeu", false,-1);
    tracep->declBit(c+199,"inst_blt", false,-1);
    tracep->declBit(c+200,"inst_bltu", false,-1);
    tracep->declBit(c+201,"inst_lb", false,-1);
    tracep->declBit(c+202,"inst_lbu", false,-1);
    tracep->declBit(c+203,"inst_lh", false,-1);
    tracep->declBit(c+204,"inst_lhu", false,-1);
    tracep->declBit(c+205,"inst_lw", false,-1);
    tracep->declBit(c+206,"inst_sb", false,-1);
    tracep->declBit(c+207,"inst_sh", false,-1);
    tracep->declBit(c+208,"inst_sw", false,-1);
    tracep->declBit(c+132,"inst_csrrw", false,-1);
    tracep->popNamePrefix(1);
    tracep->pushNamePrefix("id_identIMM ");
    tracep->declBus(c+117,"instr", false,-1, 31,0);
    tracep->declBus(c+293,"imm_sel", false,-1, 4,0);
    tracep->declBus(c+294,"imm", false,-1, 31,0);
    tracep->declBus(c+209,"immI", false,-1, 31,0);
    tracep->declBus(c+210,"immU", false,-1, 31,0);
    tracep->declBus(c+211,"immS", false,-1, 31,0);
    tracep->declBus(c+212,"immB", false,-1, 31,0);
    tracep->declBus(c+213,"immJ", false,-1, 31,0);
    tracep->popNamePrefix(1);
    tracep->pushNamePrefix("id_rf ");
    tracep->declBus(c+304,"DATA_WIDTH", false,-1, 31,0);
    tracep->declBus(c+304,"REG_NUM", false,-1, 31,0);
    tracep->declBus(c+305,"REG_NUM_BIT", false,-1, 31,0);
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBus(c+126,"raddr_a", false,-1, 4,0);
    tracep->declBus(c+127,"raddr_b", false,-1, 4,0);
    tracep->declBus(c+146,"rdata_a", false,-1, 31,0);
    tracep->declBus(c+147,"rdata_b", false,-1, 31,0);
    tracep->declBit(c+283,"wen", false,-1);
    tracep->declBus(c+284,"waddr", false,-1, 4,0);
    tracep->declBus(c+285,"wdata", false,-1, 31,0);
    for (int i = 0; i < 32; ++i) {
        tracep->declBus(c+214+i*1,"rf", true,(i+0), 31,0);
    }
    tracep->popNamePrefix(2);
    tracep->pushNamePrefix("if_stage ");
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBit(c+26,"id_allowin", false,-1);
    tracep->declBit(c+27,"if_to_id_valid", false,-1);
    tracep->declArray(c+288,"if_to_id_bus", false,-1, 95,0);
    tracep->declBus(c+12,"id_to_if_brbus", false,-1, 31,0);
    tracep->declBit(c+286,"inst_sram_en", false,-1);
    tracep->declBus(c+287,"inst_sram_addr", false,-1, 31,0);
    tracep->declBit(c+300,"inst_sram_wen", false,-1);
    tracep->declBus(c+301,"inst_sram_wdata", false,-1, 31,0);
    tracep->declBus(c+19,"inst_sram_rdata", false,-1, 31,0);
    tracep->declBit(c+64,"id_to_if_brjmpbypass", false,-1);
    tracep->declBit(c+63,"exe_to_if_loadbypass", false,-1);
    tracep->declBit(c+298,"preif_to_if_valid", false,-1);
    tracep->declBus(c+246,"snpc", false,-1, 31,0);
    tracep->declBus(c+287,"dnpc", false,-1, 31,0);
    tracep->declBus(c+299,"if_inst", false,-1, 31,0);
    tracep->declBus(c+247,"if_pc", false,-1, 31,0);
    tracep->declBit(c+248,"if_valid", false,-1);
    tracep->declBit(c+249,"if_allowin", false,-1);
    tracep->declBit(c+120,"if_ready_go", false,-1);
    tracep->declBit(c+64,"if_flush", false,-1);
    tracep->popNamePrefix(1);
    tracep->pushNamePrefix("mem_stage ");
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBit(c+302,"mem_allowin", false,-1);
    tracep->declBit(c+302,"wb_allowin", false,-1);
    tracep->declBit(c+29,"exe_to_mem_valid", false,-1);
    tracep->declArray(c+31,"exe_to_mem_bus", false,-1, 217,0);
    tracep->declBus(c+46,"mem_to_exe_brbus", false,-1, 31,0);
    tracep->declBit(c+30,"mem_to_wb_valid", false,-1);
    tracep->declArray(c+38,"mem_to_wb_bus", false,-1, 212,0);
    tracep->declBus(c+46,"wb_to_mem_brbus", false,-1, 31,0);
    tracep->declBus(c+24,"data_sram_rdata", false,-1, 31,0);
    tracep->declBus(c+51,"mem_to_id_bypass", false,-1, 31,0);
    tracep->declBus(c+52,"mem_to_id_rdbypass", false,-1, 4,0);
    tracep->declBit(c+53,"mem_to_id_rfwenbypass", false,-1);
    tracep->declBus(c+57,"mem_to_id_cfbypass", false,-1, 31,0);
    tracep->declBus(c+58,"mem_to_id_csrbypass", false,-1, 11,0);
    tracep->declBit(c+59,"mem_to_id_cfwenbypass", false,-1);
    tracep->declBit(c+66,"mem_to_exe_brjmpbypass", false,-1);
    tracep->declBit(c+66,"wb_to_mem_brjmpbypass", false,-1);
    tracep->declBit(c+30,"mem_valid", false,-1);
    tracep->declBit(c+302,"mem_ready_go", false,-1);
    tracep->declBit(c+66,"mem_flush", false,-1);
    tracep->declArray(c+250,"exe_to_mem_bus_r", false,-1, 217,0);
    tracep->declBit(c+257,"dst_load", false,-1);
    tracep->declBit(c+53,"dst_writeback", false,-1);
    tracep->declBit(c+59,"dst_writeback_csr", false,-1);
    tracep->declBus(c+258,"ls_op", false,-1, 3,0);
    tracep->declBus(c+52,"rd", false,-1, 4,0);
    tracep->declBus(c+57,"rs1", false,-1, 31,0);
    tracep->declBus(c+58,"csr", false,-1, 11,0);
    tracep->declBus(c+259,"alu_result", false,-1, 31,0);
    tracep->declBus(c+51,"writeback_result", false,-1, 31,0);
    tracep->declBus(c+260,"mem_pc", false,-1, 31,0);
    tracep->declBus(c+261,"mem_dnpc", false,-1, 31,0);
    tracep->declBus(c+262,"mem_inst", false,-1, 31,0);
    tracep->declBus(c+263,"mem_tvec", false,-1, 31,0);
    tracep->declBit(c+264,"mem_ebreak", false,-1);
    tracep->declBit(c+265,"mem_ecall", false,-1);
    tracep->declBus(c+266,"load_result", false,-1, 31,0);
    tracep->popNamePrefix(1);
    tracep->pushNamePrefix("wb_stage ");
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBit(c+302,"wb_allowin", false,-1);
    tracep->declBit(c+30,"mem_to_wb_valid", false,-1);
    tracep->declArray(c+38,"mem_to_wb_bus", false,-1, 212,0);
    tracep->declBus(c+46,"wb_to_mem_brbus", false,-1, 31,0);
    tracep->declQuad(c+291,"wb_to_id_rfbus", false,-1, 37,0);
    tracep->declQuad(c+47,"wb_to_id_cfbus", false,-1, 44,0);
    tracep->declBus(c+282,"debug_wb_pc", false,-1, 31,0);
    tracep->declBit(c+283,"debug_wb_rf_wen", false,-1);
    tracep->declBus(c+284,"debug_wb_rf_waddr", false,-1, 4,0);
    tracep->declBus(c+285,"debug_wb_rf_wdata", false,-1, 31,0);
    tracep->declBus(c+285,"wb_to_id_bypass", false,-1, 31,0);
    tracep->declBus(c+284,"wb_to_id_rdbypass", false,-1, 4,0);
    tracep->declBit(c+283,"wb_to_id_rfwenbypass", false,-1);
    tracep->declBus(c+60,"wb_to_id_cfbypass", false,-1, 31,0);
    tracep->declBus(c+61,"wb_to_id_csrbypass", false,-1, 11,0);
    tracep->declBit(c+62,"wb_to_id_cfwenbypass", false,-1);
    tracep->declBit(c+66,"wb_to_mem_brjmpbypass", false,-1);
    tracep->declBit(c+267,"wb_valid", false,-1);
    tracep->declBit(c+302,"wb_ready_go", false,-1);
    tracep->declBit(c+300,"wb_flush", false,-1);
    tracep->declArray(c+268,"mem_to_wb_bus_r", false,-1, 212,0);
    tracep->declBit(c+275,"dst_writeback", false,-1);
    tracep->declBit(c+276,"dst_writeback_csr", false,-1);
    tracep->declBus(c+284,"rd", false,-1, 4,0);
    tracep->declBus(c+61,"csr", false,-1, 11,0);
    tracep->declBus(c+60,"rs1", false,-1, 31,0);
    tracep->declBus(c+285,"writeback_result", false,-1, 31,0);
    tracep->declBit(c+277,"wb_ebreak", false,-1);
    tracep->declBit(c+66,"wb_ecall", false,-1);
    tracep->declBus(c+278,"debug_wb_dnpc", false,-1, 31,0);
    tracep->declBus(c+279,"debug_wb_inst", false,-1, 31,0);
    tracep->declBus(c+46,"wb_tvec", false,-1, 31,0);
    tracep->declBit(c+283,"wen", false,-1);
    tracep->declBus(c+284,"waddr", false,-1, 4,0);
    tracep->declBus(c+285,"wdata", false,-1, 31,0);
    tracep->declBit(c+62,"cwen", false,-1);
    tracep->declBus(c+61,"cwaddr", false,-1, 11,0);
    tracep->declBus(c+60,"cwdata", false,-1, 31,0);
    tracep->pushNamePrefix("wb_eb ");
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBit(c+277,"flag", false,-1);
    tracep->popNamePrefix(3);
    tracep->pushNamePrefix("data_sram ");
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBit(c+20,"data_sram_en", false,-1);
    tracep->declBit(c+21,"data_sram_wen", false,-1);
    tracep->declBus(c+22,"data_sram_addr", false,-1, 31,0);
    tracep->declBus(c+23,"data_sram_wdata", false,-1, 31,0);
    tracep->declBus(c+25,"data_sram_wmask", false,-1, 3,0);
    tracep->declBus(c+24,"data_sram_rdata", false,-1, 31,0);
    tracep->popNamePrefix(1);
    tracep->pushNamePrefix("inst_sram ");
    tracep->declBit(c+280,"clk", false,-1);
    tracep->declBit(c+281,"reset", false,-1);
    tracep->declBit(c+286,"inst_sram_en", false,-1);
    tracep->declBit(c+300,"inst_sram_wen", false,-1);
    tracep->declBus(c+287,"inst_sram_addr", false,-1, 31,0);
    tracep->declBus(c+301,"inst_sram_wdata", false,-1, 31,0);
    tracep->declBus(c+19,"inst_sram_rdata", false,-1, 31,0);
    tracep->popNamePrefix(2);
}

VL_ATTR_COLD void VRISCV_BOARD___024root__trace_init_top(VRISCV_BOARD___024root* vlSelf, VerilatedVcd* tracep) {
    if (false && vlSelf) {}  // Prevent unused
    VRISCV_BOARD__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
    VL_DEBUG_IF(VL_DBG_MSGF("+    VRISCV_BOARD___024root__trace_init_top\n"); );
    // Body
    VRISCV_BOARD___024root__trace_init_sub__TOP__0(vlSelf, tracep);
}

VL_ATTR_COLD void VRISCV_BOARD___024root__trace_full_top_0(void* voidSelf, VerilatedVcd::Buffer* bufp);
void VRISCV_BOARD___024root__trace_chg_top_0(void* voidSelf, VerilatedVcd::Buffer* bufp);
void VRISCV_BOARD___024root__trace_cleanup(void* voidSelf, VerilatedVcd* /*unused*/);

VL_ATTR_COLD void VRISCV_BOARD___024root__trace_register(VRISCV_BOARD___024root* vlSelf, VerilatedVcd* tracep) {
    if (false && vlSelf) {}  // Prevent unused
    VRISCV_BOARD__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
    VL_DEBUG_IF(VL_DBG_MSGF("+    VRISCV_BOARD___024root__trace_register\n"); );
    // Body
    tracep->addFullCb(&VRISCV_BOARD___024root__trace_full_top_0, vlSelf);
    tracep->addChgCb(&VRISCV_BOARD___024root__trace_chg_top_0, vlSelf);
    tracep->addCleanupCb(&VRISCV_BOARD___024root__trace_cleanup, vlSelf);
}

VL_ATTR_COLD void VRISCV_BOARD___024root__trace_full_sub_0(VRISCV_BOARD___024root* vlSelf, VerilatedVcd::Buffer* bufp);

VL_ATTR_COLD void VRISCV_BOARD___024root__trace_full_top_0(void* voidSelf, VerilatedVcd::Buffer* bufp) {
    VL_DEBUG_IF(VL_DBG_MSGF("+    VRISCV_BOARD___024root__trace_full_top_0\n"); );
    // Init
    VRISCV_BOARD___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast<VRISCV_BOARD___024root*>(voidSelf);
    VRISCV_BOARD__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
    // Body
    VRISCV_BOARD___024root__trace_full_sub_0((&vlSymsp->TOP), bufp);
}

VL_ATTR_COLD void VRISCV_BOARD___024root__trace_full_sub_0(VRISCV_BOARD___024root* vlSelf, VerilatedVcd::Buffer* bufp) {
    if (false && vlSelf) {}  // Prevent unused
    VRISCV_BOARD__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
    VL_DEBUG_IF(VL_DBG_MSGF("+    VRISCV_BOARD___024root__trace_full_sub_0\n"); );
    // Init
    uint32_t* const oldp VL_ATTR_UNUSED = bufp->oldp(vlSymsp->__Vm_baseCode);
    VlWide<8>/*255:0*/ __Vtemp_h17d7ef74__0;
    VlWide<8>/*255:0*/ __Vtemp_ha6087fcf__0;
    VlWide<10>/*319:0*/ __Vtemp_h7e9a4085__0;
    VlWide<7>/*223:0*/ __Vtemp_h444dd940__0;
    VlWide<7>/*223:0*/ __Vtemp_h99da2280__0;
    VlWide<3>/*95:0*/ __Vtemp_h186105d4__0;
    // Body
    bufp->fullBit(oldp+1,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_allowin));
    __Vtemp_h17d7ef74__0[7U] = ((0xfff00000U & ((0x800000U 
                                                 & ((~ 
                                                     ((4U 
                                                       == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                      | (5U 
                                                         == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))) 
                                                    << 0x17U)) 
                                                | ((((0x40U 
                                                      == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                     | ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__inst_lb) 
                                                        | (4U 
                                                           == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))
                                                     ? 1U
                                                     : 
                                                    (((0x41U 
                                                       == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                      | ((1U 
                                                          == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                         | (5U 
                                                            == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))
                                                      ? 3U
                                                      : 
                                                     (((0x42U 
                                                        == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                       | (2U 
                                                          == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))
                                                       ? 7U
                                                       : 0U))) 
                                                   << 0x14U))) 
                                | ((IData)(((((QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1)) 
                                              << 0x20U) 
                                             | (QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata2))) 
                                            >> 0x20U)) 
                                   >> 0xcU));
    __Vtemp_ha6087fcf__0[7U] = ((0xff000000U & (((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__dst_store) 
                                                 << 0x1bU) 
                                                | ((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__inst_lb) 
                                                     | ((4U 
                                                         == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                        | ((1U 
                                                            == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                           | ((5U 
                                                               == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                              | (2U 
                                                                 == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))))) 
                                                    << 0x1aU) 
                                                   | ((0x2000000U 
                                                       & (((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__dst_store)) 
                                                           & (~ 
                                                              ((0xc0U 
                                                                == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                               | ((0xc1U 
                                                                   == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                                  | ((0xc5U 
                                                                      == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                                     | ((0xc7U 
                                                                         == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                                        | ((0xc4U 
                                                                            == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                                           | ((0xc6U 
                                                                               == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                                              | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_ecall))))))))) 
                                                          << 0x19U)) 
                                                      | ((0xe1U 
                                                          == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                         << 0x18U))))) 
                                | __Vtemp_h17d7ef74__0[7U]);
    __Vtemp_h7e9a4085__0[0U] = (IData)((((QData)((IData)(
                                                         ((0x1c0U 
                                                           == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37)) 
                                                          & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op_ebreak)))) 
                                         << 0x21U) 
                                        | (((QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_ecall)) 
                                            << 0x20U) 
                                           | (QData)((IData)(
                                                             ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_ecall)
                                                               ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_cf__DOT__mtvec
                                                               : 0U))))));
    __Vtemp_h7e9a4085__0[1U] = ((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)
                                   ? 0U : vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U]) 
                                 << 2U) | (IData)((
                                                   (((QData)((IData)(
                                                                     ((0x1c0U 
                                                                       == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37)) 
                                                                      & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op_ebreak)))) 
                                                     << 0x21U) 
                                                    | (((QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_ecall)) 
                                                        << 0x20U) 
                                                       | (QData)((IData)(
                                                                         ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_ecall)
                                                                           ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_cf__DOT__mtvec
                                                                           : 0U))))) 
                                                   >> 0x20U)));
    __Vtemp_h7e9a4085__0[2U] = ((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)
                                   ? 0U : vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U]) 
                                 >> 0x1eU) | ((IData)(
                                                      (((QData)((IData)(
                                                                        vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[1U])) 
                                                        << 0x20U) 
                                                       | (QData)((IData)(
                                                                         vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[0U])))) 
                                              << 2U));
    __Vtemp_h7e9a4085__0[3U] = (((IData)((((QData)((IData)(
                                                           vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[1U])) 
                                           << 0x20U) 
                                          | (QData)((IData)(
                                                            vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[0U])))) 
                                 >> 0x1eU) | ((IData)(
                                                      ((((QData)((IData)(
                                                                         vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[1U])) 
                                                         << 0x20U) 
                                                        | (QData)((IData)(
                                                                          vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[0U]))) 
                                                       >> 0x20U)) 
                                              << 2U));
    __Vtemp_h7e9a4085__0[4U] = ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm 
                                 << 4U) | ((((0xc5U 
                                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                             | (0xc7U 
                                                == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))) 
                                            << 3U) 
                                           | (((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_branch_blt) 
                                               << 2U) 
                                              | ((IData)(
                                                         ((((QData)((IData)(
                                                                            vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[1U])) 
                                                            << 0x20U) 
                                                           | (QData)((IData)(
                                                                             vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[0U]))) 
                                                          >> 0x20U)) 
                                                 >> 0x1eU))));
    __Vtemp_h7e9a4085__0[5U] = (((IData)((((QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1)) 
                                           << 0x20U) 
                                          | (QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata2)))) 
                                 << 0x14U) | (((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rd) 
                                               << 0xfU) 
                                              | (((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__alu_op) 
                                                  << 4U) 
                                                 | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm 
                                                    >> 0x1cU))));
    __Vtemp_h7e9a4085__0[6U] = (((IData)((((QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1)) 
                                           << 0x20U) 
                                          | (QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata2)))) 
                                 >> 0xcU) | ((IData)(
                                                     ((((QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1)) 
                                                        << 0x20U) 
                                                       | (QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata2))) 
                                                      >> 0x20U)) 
                                             << 0x14U));
    __Vtemp_h7e9a4085__0[7U] = (((IData)((((QData)((IData)(
                                                           (((~ 
                                                              ((5U 
                                                                == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op)) 
                                                               | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4))) 
                                                             & (0xe1U 
                                                                != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))
                                                             ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1
                                                             : 
                                                            ((0xe1U 
                                                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))
                                                              ? 0U
                                                              : 
                                                             vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[1U])))) 
                                           << 0x20U) 
                                          | (QData)((IData)(
                                                            (((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)) 
                                                              & ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4)) 
                                                                 & (0xe1U 
                                                                    != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))
                                                              ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm
                                                              : 
                                                             ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)
                                                               ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata2
                                                               : 
                                                              ((0xe1U 
                                                                == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))
                                                                ? 
                                                               (~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1)
                                                                : 4U))))))) 
                                 << 0x1cU) | __Vtemp_ha6087fcf__0[7U]);
    __Vtemp_h7e9a4085__0[8U] = (((IData)((((QData)((IData)(
                                                           (((~ 
                                                              ((5U 
                                                                == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op)) 
                                                               | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4))) 
                                                             & (0xe1U 
                                                                != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))
                                                             ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1
                                                             : 
                                                            ((0xe1U 
                                                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))
                                                              ? 0U
                                                              : 
                                                             vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[1U])))) 
                                           << 0x20U) 
                                          | (QData)((IData)(
                                                            (((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)) 
                                                              & ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4)) 
                                                                 & (0xe1U 
                                                                    != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))
                                                              ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm
                                                              : 
                                                             ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)
                                                               ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata2
                                                               : 
                                                              ((0xe1U 
                                                                == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))
                                                                ? 
                                                               (~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1)
                                                                : 4U))))))) 
                                 >> 4U) | ((IData)(
                                                   ((((QData)((IData)(
                                                                      (((~ 
                                                                         ((5U 
                                                                           == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op)) 
                                                                          | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4))) 
                                                                        & (0xe1U 
                                                                           != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))
                                                                        ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1
                                                                        : 
                                                                       ((0xe1U 
                                                                         == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))
                                                                         ? 0U
                                                                         : 
                                                                        vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[1U])))) 
                                                      << 0x20U) 
                                                     | (QData)((IData)(
                                                                       (((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)) 
                                                                         & ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4)) 
                                                                            & (0xe1U 
                                                                               != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))
                                                                         ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm
                                                                         : 
                                                                        ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)
                                                                          ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata2
                                                                          : 
                                                                         ((0xe1U 
                                                                           == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))
                                                                           ? 
                                                                          (~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1)
                                                                           : 4U)))))) 
                                                    >> 0x20U)) 
                                           << 0x1cU));
    __Vtemp_h7e9a4085__0[9U] = ((IData)(((((QData)((IData)(
                                                           (((~ 
                                                              ((5U 
                                                                == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op)) 
                                                               | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4))) 
                                                             & (0xe1U 
                                                                != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))
                                                             ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1
                                                             : 
                                                            ((0xe1U 
                                                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))
                                                              ? 0U
                                                              : 
                                                             vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[1U])))) 
                                           << 0x20U) 
                                          | (QData)((IData)(
                                                            (((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)) 
                                                              & ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4)) 
                                                                 & (0xe1U 
                                                                    != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))
                                                              ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm
                                                              : 
                                                             ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)
                                                               ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata2
                                                               : 
                                                              ((0xe1U 
                                                                == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))
                                                                ? 
                                                               (~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1)
                                                                : 4U)))))) 
                                         >> 0x20U)) 
                                >> 4U);
    bufp->fullWData(oldp+2,(__Vtemp_h7e9a4085__0),316);
    bufp->fullIData(oldp+12,(((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)
                               ? ((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                   ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[0U]
                                   : (((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                        ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U] 
                                                 << 0x1eU) 
                                                | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[3U] 
                                                   >> 2U))) 
                                      + ((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                          ? 0U : ((
                                                   vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                                   << 0x1cU) 
                                                  | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U] 
                                                     >> 4U)))))
                               : ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____VdfgTmp_h141f93ed__0)
                                   ? (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[1U] 
                                      + vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm)
                                   : (0xfffffffeU & 
                                      (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1 
                                       + vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm))))),32);
    bufp->fullIData(oldp+13,((((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)) 
                               & ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4)) 
                                  & (0xe1U != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))
                               ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm
                               : ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)
                                   ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata2
                                   : ((0xe1U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))
                                       ? (~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1)
                                       : 4U)))),32);
    bufp->fullIData(oldp+14,(((0x342U == (0xfffU & vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm))
                               ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_cf__DOT__mcause
                               : ((0x341U == (0xfffU 
                                              & vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm))
                                   ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_cf__DOT__mepc
                                   : ((0x305U == (0xfffU 
                                                  & vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm))
                                       ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_cf__DOT__mtvec
                                       : ((0x300U == 
                                           (0xfffU 
                                            & vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm))
                                           ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_cf__DOT__mstatus
                                           : 0U))))),32);
    bufp->fullBit(oldp+15,(((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_to_id_csrbypass) 
                            == (0xfffU & vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm))));
    bufp->fullBit(oldp+16,((((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                              ? 0U : (0xfffU & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[4U] 
                                                >> 7U))) 
                            == (0xfffU & vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm))));
    bufp->fullBit(oldp+17,(((0xfffU & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[5U] 
                                       >> 7U)) == (0xfffU 
                                                   & vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm))));
    bufp->fullIData(oldp+18,((vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1 
                              + vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm)),32);
    bufp->fullIData(oldp+19,(vlSelf->RISCV_BOARD__DOT__inst_sram_rdata),32);
    bufp->fullBit(oldp+20,(((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__dst_load) 
                            | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__dst_store))));
    bufp->fullBit(oldp+21,(((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__dst_store) 
                            & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_valid))));
    bufp->fullIData(oldp+22,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__alu_result),32);
    bufp->fullIData(oldp+23,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                               ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[6U] 
                                        << 0xcU) | 
                                       (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                        >> 0x14U)))),32);
    bufp->fullIData(oldp+24,(vlSelf->RISCV_BOARD__DOT__data_sram_rdata),32);
    bufp->fullCData(oldp+25,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__ls_op),4);
    bufp->fullBit(oldp+26,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_allowin));
    bufp->fullBit(oldp+27,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_to_id_valid));
    bufp->fullBit(oldp+28,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_to_exe_valid));
    bufp->fullBit(oldp+29,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_valid));
    bufp->fullBit(oldp+30,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__mem_valid));
    __Vtemp_h444dd940__0[0U] = (IData)(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                         ? 0ULL : (0x3ffffffffULL 
                                                   & (((QData)((IData)(
                                                                       vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[1U])) 
                                                       << 0x20U) 
                                                      | (QData)((IData)(
                                                                        vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[0U]))))));
    __Vtemp_h444dd940__0[1U] = (((IData)(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                           ? 0ULL : 
                                          (((QData)((IData)(
                                                            vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U])) 
                                            << 0x3eU) 
                                           | (((QData)((IData)(
                                                               vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[3U])) 
                                               << 0x1eU) 
                                              | ((QData)((IData)(
                                                                 vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[2U])) 
                                                 >> 2U))))) 
                                 << 2U) | (IData)((
                                                   ((1U 
                                                     & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                                     ? 0ULL
                                                     : 
                                                    (0x3ffffffffULL 
                                                     & (((QData)((IData)(
                                                                         vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[1U])) 
                                                         << 0x20U) 
                                                        | (QData)((IData)(
                                                                          vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[0U]))))) 
                                                   >> 0x20U)));
    __Vtemp_h444dd940__0[2U] = (((IData)(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                           ? 0ULL : 
                                          (((QData)((IData)(
                                                            vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U])) 
                                            << 0x3eU) 
                                           | (((QData)((IData)(
                                                               vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[3U])) 
                                               << 0x1eU) 
                                              | ((QData)((IData)(
                                                                 vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[2U])) 
                                                 >> 2U))))) 
                                 >> 0x1eU) | ((IData)(
                                                      (((1U 
                                                         & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                                         ? 0ULL
                                                         : 
                                                        (((QData)((IData)(
                                                                          vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U])) 
                                                          << 0x3eU) 
                                                         | (((QData)((IData)(
                                                                             vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[3U])) 
                                                             << 0x1eU) 
                                                            | ((QData)((IData)(
                                                                               vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[2U])) 
                                                               >> 2U)))) 
                                                       >> 0x20U)) 
                                              << 2U));
    __Vtemp_h444dd940__0[3U] = ((((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                   ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[7U] 
                                            << 0xcU) 
                                           | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[6U] 
                                              >> 0x14U))) 
                                 << 7U) | (((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__rd) 
                                            << 2U) 
                                           | ((IData)(
                                                      (((1U 
                                                         & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                                         ? 0ULL
                                                         : 
                                                        (((QData)((IData)(
                                                                          vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U])) 
                                                          << 0x3eU) 
                                                         | (((QData)((IData)(
                                                                             vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[3U])) 
                                                             << 0x1eU) 
                                                            | ((QData)((IData)(
                                                                               vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[2U])) 
                                                               >> 2U)))) 
                                                       >> 0x20U)) 
                                              >> 0x1eU)));
    __Vtemp_h444dd940__0[4U] = ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__alu_result 
                                 << 0x13U) | (((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_to_id_csrbypass) 
                                               << 7U) 
                                              | (((1U 
                                                   & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                                   ? 0U
                                                   : 
                                                  ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[7U] 
                                                    << 0xcU) 
                                                   | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[6U] 
                                                      >> 0x14U))) 
                                                 >> 0x19U)));
    __Vtemp_h444dd940__0[5U] = ((((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                   ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[2U] 
                                            << 0x1eU) 
                                           | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[1U] 
                                              >> 2U))) 
                                 << 0x17U) | (((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__ls_op) 
                                               << 0x13U) 
                                              | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__alu_result 
                                                 >> 0xdU)));
    __Vtemp_h444dd940__0[6U] = ((((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                   ? 0U : (7U & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[7U] 
                                                 >> 0x18U))) 
                                 << 0x17U) | (((1U 
                                                & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                                ? 0U
                                                : (
                                                   (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[2U] 
                                                    << 0x1eU) 
                                                   | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[1U] 
                                                      >> 2U))) 
                                              >> 9U));
    bufp->fullWData(oldp+31,(__Vtemp_h444dd940__0),218);
    if ((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])) {
        __Vtemp_h99da2280__0[0U] = 0U;
        __Vtemp_h99da2280__0[1U] = 0U;
        __Vtemp_h99da2280__0[2U] = 0U;
    } else {
        __Vtemp_h99da2280__0[0U] = vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[0U];
        __Vtemp_h99da2280__0[1U] = vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[1U];
        __Vtemp_h99da2280__0[2U] = vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[2U];
    }
    __Vtemp_h99da2280__0[3U] = ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__writeback_result 
                                 << 2U) | ((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                            ? 0U : 
                                           (3U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[3U])));
    __Vtemp_h99da2280__0[4U] = (((IData)(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                           ? 0ULL : 
                                          (0x1ffffffffffffULL 
                                           & (((QData)((IData)(
                                                               vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[4U])) 
                                               << 0x1eU) 
                                              | ((QData)((IData)(
                                                                 vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[3U])) 
                                                 >> 2U))))) 
                                 << 2U) | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__writeback_result 
                                           >> 0x1eU));
    __Vtemp_h99da2280__0[5U] = (((IData)(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                           ? 0ULL : 
                                          (0x3ffffffffULL 
                                           & (((QData)((IData)(
                                                               vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[6U])) 
                                               << 9U) 
                                              | ((QData)((IData)(
                                                                 vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[5U])) 
                                                 >> 0x17U))))) 
                                 << 0x13U) | (((IData)(
                                                       ((1U 
                                                         & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                                         ? 0ULL
                                                         : 
                                                        (0x1ffffffffffffULL 
                                                         & (((QData)((IData)(
                                                                             vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[4U])) 
                                                             << 0x1eU) 
                                                            | ((QData)((IData)(
                                                                               vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[3U])) 
                                                               >> 2U))))) 
                                               >> 0x1eU) 
                                              | ((IData)(
                                                         (((1U 
                                                            & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                                            ? 0ULL
                                                            : 
                                                           (0x1ffffffffffffULL 
                                                            & (((QData)((IData)(
                                                                                vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[4U])) 
                                                                << 0x1eU) 
                                                               | ((QData)((IData)(
                                                                                vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[3U])) 
                                                                  >> 2U)))) 
                                                          >> 0x20U)) 
                                                 << 2U)));
    __Vtemp_h99da2280__0[6U] = (((IData)(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                           ? 0ULL : 
                                          (0x3ffffffffULL 
                                           & (((QData)((IData)(
                                                               vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[6U])) 
                                               << 9U) 
                                              | ((QData)((IData)(
                                                                 vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[5U])) 
                                                 >> 0x17U))))) 
                                 >> 0xdU) | ((IData)(
                                                     (((1U 
                                                        & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                                        ? 0ULL
                                                        : 
                                                       (0x3ffffffffULL 
                                                        & (((QData)((IData)(
                                                                            vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[6U])) 
                                                            << 9U) 
                                                           | ((QData)((IData)(
                                                                              vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[5U])) 
                                                              >> 0x17U)))) 
                                                      >> 0x20U)) 
                                             << 0x13U));
    bufp->fullWData(oldp+38,(__Vtemp_h99da2280__0),213);
    bufp->fullIData(oldp+45,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                               ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[0U]
                               : (((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                    ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U] 
                                             << 0x1eU) 
                                            | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[3U] 
                                               >> 2U))) 
                                  + ((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                      ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                               << 0x1cU) 
                                              | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U] 
                                                 >> 4U)))))),32);
    bufp->fullIData(oldp+46,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[0U]),32);
    bufp->fullQData(oldp+47,((((QData)((IData)(((vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[6U] 
                                                 >> 0x13U) 
                                                & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__wb_valid)))) 
                               << 0x2cU) | (0xfffffffffffULL 
                                            & (((QData)((IData)(
                                                                vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[5U])) 
                                                << 0x19U) 
                                               | ((QData)((IData)(
                                                                  vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[4U])) 
                                                  >> 7U))))),45);
    bufp->fullCData(oldp+49,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__rd),5);
    bufp->fullBit(oldp+50,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_to_id_rfwenbypass));
    bufp->fullIData(oldp+51,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__writeback_result),32);
    bufp->fullCData(oldp+52,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__rd),5);
    bufp->fullBit(oldp+53,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__dst_writeback));
    bufp->fullIData(oldp+54,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                               ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[7U] 
                                        << 0xcU) | 
                                       (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[6U] 
                                        >> 0x14U)))),32);
    bufp->fullSData(oldp+55,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_to_id_csrbypass),12);
    bufp->fullBit(oldp+56,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[7U] 
                                     >> 0x18U)))));
    bufp->fullIData(oldp+57,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                               ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[4U] 
                                        << 0x19U) | 
                                       (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[3U] 
                                        >> 7U)))),32);
    bufp->fullSData(oldp+58,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                               ? 0U : (0xfffU & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[4U] 
                                                 >> 7U)))),12);
    bufp->fullBit(oldp+59,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[6U] 
                                     >> 0x17U)))));
    bufp->fullIData(oldp+60,(((vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[5U] 
                               << 0x19U) | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[4U] 
                                            >> 7U))),32);
    bufp->fullSData(oldp+61,((0xfffU & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[5U] 
                                        >> 7U))),12);
    bufp->fullBit(oldp+62,(((vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[6U] 
                             >> 0x13U) & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__wb_valid))));
    bufp->fullBit(oldp+63,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_to_if_loadbypass));
    bufp->fullBit(oldp+64,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__if_flush));
    bufp->fullBit(oldp+65,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush));
    bufp->fullBit(oldp+66,((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])));
    bufp->fullWData(oldp+67,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r),316);
    bufp->fullIData(oldp+77,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_a),32);
    bufp->fullIData(oldp+78,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__lui_result),32);
    bufp->fullBit(oldp+79,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__dst_load));
    bufp->fullBit(oldp+80,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__dst_store));
    bufp->fullBit(oldp+81,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[7U] 
                                     >> 0x19U)))));
    bufp->fullIData(oldp+82,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                               ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                        << 0x1cU) | 
                                       (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U] 
                                        >> 4U)))),32);
    bufp->fullSData(oldp+83,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                               ? 0U : (0x7ffU & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                                 >> 4U)))),11);
    bufp->fullBit(oldp+84,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U] 
                                     >> 3U)))));
    bufp->fullBit(oldp+85,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U] 
                                     >> 2U)))));
    bufp->fullIData(oldp+86,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                               ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[4U] 
                                        << 0x1eU) | 
                                       (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[3U] 
                                        >> 2U)))),32);
    bufp->fullIData(oldp+87,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                               ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[3U] 
                                        << 0x1eU) | 
                                       (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[2U] 
                                        >> 2U)))),32);
    bufp->fullIData(oldp+88,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                               ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[2U] 
                                        << 0x1eU) | 
                                       (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[1U] 
                                        >> 2U)))),32);
    bufp->fullIData(oldp+89,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                               ? 0U : vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[0U])),32);
    bufp->fullBit(oldp+90,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[1U] 
                                     >> 1U)))));
    bufp->fullBit(oldp+91,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[1U]))));
    bufp->fullBit(oldp+92,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                     >> 4U)))));
    bufp->fullBit(oldp+93,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__op_sub));
    bufp->fullBit(oldp+94,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__op_slt));
    bufp->fullBit(oldp+95,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__op_sltu));
    bufp->fullBit(oldp+96,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                     >> 8U)))));
    bufp->fullBit(oldp+97,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                     >> 9U)))));
    bufp->fullBit(oldp+98,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                     >> 0xaU)))));
    bufp->fullBit(oldp+99,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                     >> 0xbU)))));
    bufp->fullBit(oldp+100,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                   & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                      >> 0xcU)))));
    bufp->fullBit(oldp+101,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__op_sra));
    bufp->fullBit(oldp+102,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                   & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__id_to_exe_bus_r[5U] 
                                      >> 0xeU)))));
    bufp->fullIData(oldp+103,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__add_sub_result),32);
    bufp->fullIData(oldp+104,((1U & (((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT____VdfgTmp_h25d289c6__0)) 
                                      & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT____VdfgTmp_h9dbf4c0d__0)) 
                                     | ((~ ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT____VdfgTmp_h9dbf4c0d__0) 
                                            ^ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT____VdfgTmp_h25d289c6__0))) 
                                        & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__add_sub_result 
                                           >> 0x1fU))))),32);
    bufp->fullIData(oldp+105,((1U & (~ (IData)((1ULL 
                                                & (((QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_a)) 
                                                    + 
                                                    ((QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_b)) 
                                                     + (QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_cin)))) 
                                                   >> 0x20U)))))),32);
    bufp->fullIData(oldp+106,((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_a 
                               & vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__lui_result)),32);
    bufp->fullIData(oldp+107,((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_a 
                               | vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__lui_result)),32);
    bufp->fullIData(oldp+108,((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_a 
                               ^ vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__lui_result)),32);
    bufp->fullIData(oldp+109,((vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_a 
                               << (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT____VdfgTmp_h255a08e4__0))),32);
    bufp->fullQData(oldp+110,(((((QData)((IData)((- (IData)(
                                                            ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__op_sra) 
                                                             & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT____VdfgTmp_h9dbf4c0d__0)))))) 
                                 << 0x20U) | (QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_a))) 
                               >> (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT____VdfgTmp_h255a08e4__0))),64);
    bufp->fullIData(oldp+112,((IData)(((((QData)((IData)(
                                                         (- (IData)(
                                                                    ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__op_sra) 
                                                                     & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT____VdfgTmp_h9dbf4c0d__0)))))) 
                                         << 0x20U) 
                                        | (QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_a))) 
                                       >> (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT____VdfgTmp_h255a08e4__0)))),32);
    bufp->fullIData(oldp+113,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_b),32);
    bufp->fullBit(oldp+114,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_cin));
    bufp->fullBit(oldp+115,((1U & (IData)((1ULL & (
                                                   ((QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_a)) 
                                                    + 
                                                    ((QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_b)) 
                                                     + (QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__exe_alu__DOT__adder_cin)))) 
                                                   >> 0x20U))))));
    bufp->fullIData(oldp+116,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[1U]),32);
    bufp->fullIData(oldp+117,(((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)
                                ? 0U : vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U])),32);
    bufp->fullIData(oldp+118,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[0U]),32);
    bufp->fullBit(oldp+119,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_valid));
    bufp->fullBit(oldp+120,((1U & (~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_to_if_loadbypass)))));
    bufp->fullWData(oldp+121,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r),96);
    bufp->fullIData(oldp+124,((((~ ((5U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op)) 
                                    | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4))) 
                                & (0xe1U != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))
                                ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1
                                : ((0xe1U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))
                                    ? 0U : vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[1U]))),32);
    bufp->fullCData(oldp+125,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op),5);
    bufp->fullCData(oldp+126,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs1),5);
    bufp->fullCData(oldp+127,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs2),5);
    bufp->fullCData(oldp+128,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rd),5);
    bufp->fullCData(oldp+129,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__func3),3);
    bufp->fullBit(oldp+130,((1U & ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)) 
                                   & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U] 
                                      >> 0x1eU)))));
    bufp->fullBit(oldp+131,((1U & ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)) 
                                   & vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U]))));
    bufp->fullBit(oldp+132,((0xe1U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullCData(oldp+133,(((((5U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op)) 
                                 | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4)) 
                                << 1U) | ((~ ((5U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op)) 
                                              | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4))) 
                                          & (0xe1U 
                                             != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))),2);
    bufp->fullCData(oldp+134,((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4) 
                                << 2U) | (((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2) 
                                           << 1U) | 
                                          ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)) 
                                           & ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4)) 
                                              & (0xe1U 
                                                 != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))))),3);
    bufp->fullCData(oldp+135,((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__dst_store) 
                                << 3U) | ((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__inst_lb) 
                                            | ((4U 
                                                == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                               | ((1U 
                                                   == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                  | ((5U 
                                                      == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                     | (2U 
                                                        == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))))) 
                                           << 2U) | 
                                          ((2U & ((
                                                   (~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__dst_store)) 
                                                   & (~ 
                                                      ((0xc0U 
                                                        == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                       | ((0xc1U 
                                                           == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                          | ((0xc5U 
                                                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                             | ((0xc7U 
                                                                 == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                                | ((0xc4U 
                                                                    == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                                   | ((0xc6U 
                                                                       == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                                      | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_ecall))))))))) 
                                                  << 1U)) 
                                           | (0xe1U 
                                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))))),4);
    bufp->fullSData(oldp+136,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__alu_op),11);
    bufp->fullCData(oldp+137,(((8U & ((~ ((4U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                          | (5U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))) 
                                      << 3U)) | (((0x40U 
                                                   == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                  | ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__inst_lb) 
                                                     | (4U 
                                                        == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))
                                                  ? 1U
                                                  : 
                                                 (((0x41U 
                                                    == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                   | ((1U 
                                                       == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                      | (5U 
                                                         == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))
                                                   ? 3U
                                                   : 
                                                  (((0x42U 
                                                     == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                    | (2U 
                                                       == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))
                                                    ? 7U
                                                    : 0U))))),4);
    bufp->fullBit(oldp+138,((((0xc0U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                              & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__branch_rs1_eq_rs2)) 
                             | ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__branch_rs1_eq_rs2)) 
                                & (0xc1U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))));
    bufp->fullBit(oldp+139,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__branch_rs1_eq_rs2));
    bufp->fullBit(oldp+140,(((0xc5U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                             | (0xc7U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))));
    bufp->fullBit(oldp+141,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_branch_blt));
    bufp->fullBit(oldp+142,((0x1bU == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op))));
    bufp->fullBit(oldp+143,((0xc8U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+144,(((0x1c0U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37)) 
                             & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op_ebreak))));
    bufp->fullBit(oldp+145,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_ecall));
    bufp->fullIData(oldp+146,(((0U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs1))
                                ? 0U : vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf
                               [vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs1])),32);
    bufp->fullIData(oldp+147,(((0U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs2))
                                ? 0U : vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf
                               [vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs2])),32);
    bufp->fullIData(oldp+148,(((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_ecall)
                                ? vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_cf__DOT__mtvec
                                : 0U)),32);
    bufp->fullIData(oldp+149,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata1),32);
    bufp->fullIData(oldp+150,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rdata2),32);
    bufp->fullBit(oldp+151,((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__rd) 
                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs1)) 
                             & (0U != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs1)))));
    bufp->fullBit(oldp+152,((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__exe_stage__DOT__rd) 
                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs2)) 
                             & (0U != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs2)))));
    bufp->fullBit(oldp+153,((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__rd) 
                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs1)) 
                             & (0U != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs1)))));
    bufp->fullBit(oldp+154,((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__rd) 
                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs2)) 
                             & (0U != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs2)))));
    bufp->fullIData(oldp+155,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_cf__DOT__mcause),32);
    bufp->fullIData(oldp+156,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_cf__DOT__mepc),32);
    bufp->fullIData(oldp+157,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_cf__DOT__mtvec),32);
    bufp->fullIData(oldp+158,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_cf__DOT__mstatus),32);
    bufp->fullBit(oldp+159,((0x342U == (0xfffU & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[5U] 
                                                  >> 7U)))));
    bufp->fullBit(oldp+160,((0x341U == (0xfffU & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[5U] 
                                                  >> 7U)))));
    bufp->fullBit(oldp+161,((0x305U == (0xfffU & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[5U] 
                                                  >> 7U)))));
    bufp->fullBit(oldp+162,((0x300U == (0xfffU & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[5U] 
                                                  >> 7U)))));
    bufp->fullCData(oldp+163,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3),8);
    bufp->fullSData(oldp+164,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37),9);
    bufp->fullBit(oldp+165,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op_ebreak));
    bufp->fullBit(oldp+166,(((5U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op)) 
                             | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4))));
    bufp->fullBit(oldp+167,(((~ ((5U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op)) 
                                 | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4))) 
                             & (0xe1U != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)))));
    bufp->fullBit(oldp+168,(((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2)) 
                             & ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4)) 
                                & (0xe1U != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))));
    bufp->fullBit(oldp+169,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_rs2));
    bufp->fullBit(oldp+170,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__src2_is_4));
    bufp->fullBit(oldp+171,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__dst_store));
    bufp->fullBit(oldp+172,(((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__inst_lb) 
                             | ((4U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                | ((1U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                   | ((5U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                      | (2U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))))))));
    bufp->fullBit(oldp+173,((1U & ((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__dst_store)) 
                                   & (~ ((0xc0U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                         | ((0xc1U 
                                             == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                            | ((0xc5U 
                                                == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                               | ((0xc7U 
                                                   == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                  | ((0xc4U 
                                                      == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                     | ((0xc6U 
                                                         == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3)) 
                                                        | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_ecall))))))))))));
    bufp->fullBit(oldp+174,((0xdU == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op))));
    bufp->fullBit(oldp+175,((5U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__op))));
    bufp->fullBit(oldp+176,((0xc0U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+177,((0x20U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+178,((0xc1U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+179,((0xceU == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+180,((0x27U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+181,((0xccU == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+182,((0x26U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+183,((0xc8U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+184,((0x24U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+185,((0xc4U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+186,((0x22U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+187,((0xc6U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+188,((0x23U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+189,((0xc2U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+190,((0x42U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+191,((0xcaU == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+192,((0x4aU == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+193,((0xcbU == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+194,((0x4bU == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op37))));
    bufp->fullBit(oldp+195,((0xc0U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+196,((0xc1U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+197,((0xc5U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+198,((0xc7U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+199,((0xc4U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+200,((0xc6U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+201,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_dec__DOT__inst_lb));
    bufp->fullBit(oldp+202,((4U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+203,((1U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+204,((5U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+205,((2U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+206,((0x40U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+207,((0x41U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullBit(oldp+208,((0x42U == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op3))));
    bufp->fullIData(oldp+209,((((- (IData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_identIMM__DOT____VdfgTmp_h78278846__0))) 
                                << 0xcU) | ((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)
                                             ? 0U : 
                                            (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U] 
                                             >> 0x14U)))),32);
    bufp->fullIData(oldp+210,((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)
                                 ? 0U : (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U] 
                                         >> 0xcU)) 
                               << 0xcU)),32);
    bufp->fullIData(oldp+211,((((- (IData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_identIMM__DOT____VdfgTmp_h78278846__0))) 
                                << 0xcU) | ((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)
                                               ? 0U
                                               : (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U] 
                                                  >> 0x19U)) 
                                             << 5U) 
                                            | (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rd)))),32);
    bufp->fullIData(oldp+212,((((- (IData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_identIMM__DOT____VdfgTmp_h78278846__0))) 
                                << 0xcU) | ((0x800U 
                                             & (((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)) 
                                                 << 0xbU) 
                                                & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U] 
                                                   << 4U))) 
                                            | ((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)
                                                  ? 0U
                                                  : 
                                                 (0x3fU 
                                                  & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U] 
                                                     >> 0x19U))) 
                                                << 5U) 
                                               | (((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)
                                                    ? 0U
                                                    : 
                                                   (0xfU 
                                                    & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U] 
                                                       >> 8U))) 
                                                  << 1U))))),32);
    bufp->fullIData(oldp+213,((((- (IData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_identIMM__DOT____VdfgTmp_h78278846__0))) 
                                << 0x14U) | ((((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)
                                                ? 0U
                                                : (0xffU 
                                                   & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U] 
                                                      >> 0xcU))) 
                                              << 0xcU) 
                                             | (((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT____Vcellinp__id_dec__op_ebreak) 
                                                 << 0xbU) 
                                                | (((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_flush)
                                                     ? 0U
                                                     : 
                                                    (0x3ffU 
                                                     & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__if_to_id_bus_r[2U] 
                                                        >> 0x15U))) 
                                                   << 1U))))),32);
    bufp->fullIData(oldp+214,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[0]),32);
    bufp->fullIData(oldp+215,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[1]),32);
    bufp->fullIData(oldp+216,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[2]),32);
    bufp->fullIData(oldp+217,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[3]),32);
    bufp->fullIData(oldp+218,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[4]),32);
    bufp->fullIData(oldp+219,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[5]),32);
    bufp->fullIData(oldp+220,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[6]),32);
    bufp->fullIData(oldp+221,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[7]),32);
    bufp->fullIData(oldp+222,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[8]),32);
    bufp->fullIData(oldp+223,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[9]),32);
    bufp->fullIData(oldp+224,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[10]),32);
    bufp->fullIData(oldp+225,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[11]),32);
    bufp->fullIData(oldp+226,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[12]),32);
    bufp->fullIData(oldp+227,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[13]),32);
    bufp->fullIData(oldp+228,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[14]),32);
    bufp->fullIData(oldp+229,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[15]),32);
    bufp->fullIData(oldp+230,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[16]),32);
    bufp->fullIData(oldp+231,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[17]),32);
    bufp->fullIData(oldp+232,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[18]),32);
    bufp->fullIData(oldp+233,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[19]),32);
    bufp->fullIData(oldp+234,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[20]),32);
    bufp->fullIData(oldp+235,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[21]),32);
    bufp->fullIData(oldp+236,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[22]),32);
    bufp->fullIData(oldp+237,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[23]),32);
    bufp->fullIData(oldp+238,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[24]),32);
    bufp->fullIData(oldp+239,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[25]),32);
    bufp->fullIData(oldp+240,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[26]),32);
    bufp->fullIData(oldp+241,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[27]),32);
    bufp->fullIData(oldp+242,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[28]),32);
    bufp->fullIData(oldp+243,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[29]),32);
    bufp->fullIData(oldp+244,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[30]),32);
    bufp->fullIData(oldp+245,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__id_rf__DOT__rf[31]),32);
    bufp->fullIData(oldp+246,(((IData)(4U) + vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__if_pc)),32);
    bufp->fullIData(oldp+247,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__if_pc),32);
    bufp->fullBit(oldp+248,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__if_valid));
    bufp->fullBit(oldp+249,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__if_allowin));
    bufp->fullWData(oldp+250,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r),218);
    bufp->fullBit(oldp+257,((IData)(((vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[6U] 
                                      >> 0x19U) & (~ 
                                                   vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])))));
    bufp->fullCData(oldp+258,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                ? 0U : (0xfU & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[5U] 
                                                >> 0x13U)))),4);
    bufp->fullIData(oldp+259,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[5U] 
                                         << 0xdU) | 
                                        (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[4U] 
                                         >> 0x13U)))),32);
    bufp->fullIData(oldp+260,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[3U] 
                                         << 0x1eU) 
                                        | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[2U] 
                                           >> 2U)))),32);
    bufp->fullIData(oldp+261,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[2U] 
                                         << 0x1eU) 
                                        | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[1U] 
                                           >> 2U)))),32);
    bufp->fullIData(oldp+262,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                ? 0U : ((vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[6U] 
                                         << 9U) | (
                                                   vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[5U] 
                                                   >> 0x17U)))),32);
    bufp->fullIData(oldp+263,(((1U & vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U])
                                ? 0U : vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[0U])),32);
    bufp->fullBit(oldp+264,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                   & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[1U] 
                                      >> 1U)))));
    bufp->fullBit(oldp+265,((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                   & vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[1U]))));
    bufp->fullIData(oldp+266,(((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                      & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[5U] 
                                         >> 0x15U)))
                                ? vlSelf->RISCV_BOARD__DOT__data_sram_rdata
                                : ((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                          & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[5U] 
                                             >> 0x14U)))
                                    ? (((- (IData)(
                                                   ((vlSelf->RISCV_BOARD__DOT__data_sram_rdata 
                                                     >> 0xfU) 
                                                    & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT____VdfgTmp_h0c27a012__0)))) 
                                        << 0x10U) | 
                                       (0xffffU & vlSelf->RISCV_BOARD__DOT__data_sram_rdata))
                                    : ((1U & ((~ vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U]) 
                                              & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT__exe_to_mem_bus_r[5U] 
                                                 >> 0x13U)))
                                        ? (((- (IData)(
                                                       ((vlSelf->RISCV_BOARD__DOT__data_sram_rdata 
                                                         >> 7U) 
                                                        & (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__mem_stage__DOT____VdfgTmp_h0c27a012__0)))) 
                                            << 8U) 
                                           | (0xffU 
                                              & vlSelf->RISCV_BOARD__DOT__data_sram_rdata))
                                        : 0U)))),32);
    bufp->fullBit(oldp+267,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__wb_valid));
    bufp->fullWData(oldp+268,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r),213);
    bufp->fullBit(oldp+275,((1U & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[6U] 
                                   >> 0x14U))));
    bufp->fullBit(oldp+276,((1U & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[6U] 
                                   >> 0x13U))));
    bufp->fullBit(oldp+277,((1U & (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U] 
                                   >> 1U))));
    bufp->fullIData(oldp+278,(((vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[2U] 
                                << 0x1eU) | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[1U] 
                                             >> 2U))),32);
    bufp->fullIData(oldp+279,(((vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[6U] 
                                << 0xdU) | (vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[5U] 
                                            >> 0x13U))),32);
    bufp->fullBit(oldp+280,(vlSelf->clk));
    bufp->fullBit(oldp+281,(vlSelf->reset));
    bufp->fullIData(oldp+282,(vlSelf->debug_wb_pc),32);
    bufp->fullBit(oldp+283,(vlSelf->debug_wb_rf_wen));
    bufp->fullCData(oldp+284,(vlSelf->debug_wb_rf_waddr),5);
    bufp->fullIData(oldp+285,(vlSelf->debug_wb_rf_wdata),32);
    bufp->fullBit(oldp+286,(vlSelf->RISCV_BOARD__DOT__inst_sram_en));
    bufp->fullIData(oldp+287,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__dnpc),32);
    __Vtemp_h186105d4__0[0U] = vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__dnpc;
    __Vtemp_h186105d4__0[1U] = (IData)((((QData)((IData)(
                                                         (((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__if_flush)) 
                                                           & (IData)(vlSelf->RISCV_BOARD__DOT__inst_sram_en))
                                                           ? vlSelf->RISCV_BOARD__DOT__inst_sram_rdata
                                                           : 0U))) 
                                         << 0x20U) 
                                        | (QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__if_pc))));
    __Vtemp_h186105d4__0[2U] = (IData)(((((QData)((IData)(
                                                          (((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__if_flush)) 
                                                            & (IData)(vlSelf->RISCV_BOARD__DOT__inst_sram_en))
                                                            ? vlSelf->RISCV_BOARD__DOT__inst_sram_rdata
                                                            : 0U))) 
                                          << 0x20U) 
                                         | (QData)((IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__if_pc))) 
                                        >> 0x20U));
    bufp->fullWData(oldp+288,(__Vtemp_h186105d4__0),96);
    bufp->fullQData(oldp+291,((((QData)((IData)(vlSelf->debug_wb_rf_wen)) 
                                << 0x25U) | (0x1fffffffffULL 
                                             & (((QData)((IData)(
                                                                 vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[4U])) 
                                                 << 0x1eU) 
                                                | ((QData)((IData)(
                                                                   vlSelf->RISCV_BOARD__DOT__cpu__DOT__wb_stage__DOT__mem_to_wb_bus_r[3U])) 
                                                   >> 2U))))),38);
    bufp->fullCData(oldp+293,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm_sel),5);
    bufp->fullIData(oldp+294,(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm),32);
    bufp->fullSData(oldp+295,((0xfffU & vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__imm)),12);
    bufp->fullBit(oldp+296,((((IData)(vlSelf->debug_wb_rf_waddr) 
                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs1)) 
                             & (0U != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs1)))));
    bufp->fullBit(oldp+297,((((IData)(vlSelf->debug_wb_rf_waddr) 
                              == (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs2)) 
                             & (0U != (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__id_stage__DOT__rs2)))));
    bufp->fullBit(oldp+298,((1U & (~ (IData)(vlSelf->reset)))));
    bufp->fullIData(oldp+299,((((~ (IData)(vlSelf->RISCV_BOARD__DOT__cpu__DOT__if_stage__DOT__if_flush)) 
                                & (IData)(vlSelf->RISCV_BOARD__DOT__inst_sram_en))
                                ? vlSelf->RISCV_BOARD__DOT__inst_sram_rdata
                                : 0U)),32);
    bufp->fullBit(oldp+300,(0U));
    bufp->fullIData(oldp+301,(0U),32);
    bufp->fullBit(oldp+302,(1U));
    bufp->fullIData(oldp+303,(0xbU),32);
    bufp->fullIData(oldp+304,(0x20U),32);
    bufp->fullIData(oldp+305,(5U),32);
}
